A highly linear current-starved VCO based on a linearized current control mechanism

Saeidehkabirpour | Mohsen Jalali

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URL :   http://research.shahed.ac.ir/WSR/WebPages/Report/PaperView.aspx?PaperID=116962
Date :  2019/10/12
Publish in :    Integration, the VLSI Journal
DOI :  https://doi.org/10.1016/j.vlsi.2019.06.008
Link :  http://dx.doi.org/10.1016/j.vlsi.2019.06.008
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Abstract :

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A highly linear voltage controlled oscillator (VCO) suitable for emerging time-based and VCO-based applications is presented. By providing a very linear and high dynamic range biasing current for a current-starved ring-oscillator, improved linearity is achieved over rail-to-rail input control voltage. The input control voltage is first mapped by a resistive network and then is transformed to a biasing current by means of two linear voltage-to-current (V/I) converters with proportional and complementary behavior with respect to the control voltage. The difference between output currents of the V/I converters is utilized to enhance the linearity and frequency tuning range of the VCO. The proposed architecture is very compact and can be employed for most of current-starved ring oscillators regardless of delay element topology. Simulation results with a 1.8-V 0.18-μm standard CMOS technology show that for a rail-to-rail input voltage, the nonlinearity of frequency error using a simple single-ended delay element ranges from 0.02 to 0.9. By using a differential delay element, the maximum frequency error reduces to 0.66.