Using on-chip networks to implement polymorphism in the co-design of object-oriented embedded systems

Naser Mohammadzadeh | Maziar Goudarzi | Shaahin Hessabi

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URL :   http://research.shahed.ac.ir/WSR/WebPages/Report/PaperView.aspx?PaperID=158527
Date :  2007/12/01
Publish in :    Journal of Computer and System Sciences
DOI :  https://doi.org/doi.org/10.1016/j.jcss.2007.02.009
Link :  https://www.sciencedirect.com/science/article/pii/S0022000007000141
Keywords :Embedded systemsObject-oriented designNetwork-on-chip (NoC)Hardware–software co-designPolymorphismVirtual method dispatchApplication-specific instruction processor (ASIP)

Abstract :

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The Network-on-Chip (NoC) paradigm brings networks inside chips. We use the routing capabilities inside NoC to serve as a replacement for Virtual Method Table (VMT) for Object-Oriented (OO) designed hardware/software co-design systems where some methods could be implemented as hardware modules. This eliminates VMT area and performance overhead in OO co-designed embedded systems where resources are limited and where some functionality needs to be implemented in hardware to meet performance goals of the system. Our experimental results on real world embedded applications show up to 32.15 lower area and up to 5.1 higher speed compared to traditional implementation using VMT.