Design and implementation of a power and area optimized reconfigurable superset parallel prefix adder

S. A. H. Ejtahed | M.B. Ghaznavi-Ghoushchi

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URL :   http://research.shahed.ac.ir/WSR/WebPages/Report/PaperView.aspx?PaperID=42720
Date :  2016/05/10
Publish in :    2016 24th Iranian Conference on Electrical Engineering (ICEE) ICEE2016
DOI :  https://doi.org/10.1109/iraniancee.2016.7585787
Link :  http://dx.doi.org/10.1109/IranianCEE.2016.7585787
Keywords :Power, Reconfigurable, Parallel

Abstract :

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http://dx.doi.org/10.1109/IranianCEE.2016.7585787