Shahed University
Very High Speed and Low Voltage Open-Loop Dual Edge Triggered Sample and Hold Circuit in 0.18um CMOS Technology
M. Hassan Sagha | Mohsen Jalali
URL :
http://research.shahed.ac.ir/WSR/WebPages/Report/PaperView.aspx?PaperID=7463
Date :
2012/09/20
Publish in :
IEEE International Conference on Semiconductor Electronics
Keywords :
Speed, Voltage, CMOS
Abstract :
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Mohsen Jalali