A 14.8 ps jitter low-power dual band all digital PLL with reconfigurable DCO and time-interlined multiplexers

M. Souri | M.B. Ghaznavi-Ghoushchi

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URL :   http://research.shahed.ac.ir/WSR/WebPages/Report/PaperView.aspx?PaperID=10485
Date :  2015/01/11
Publish in :    Analog Integrated Circuits and Signal Processing
DOI :  https://doi.org/10.1007/s10470-014-0480-0
Link :  http://dx.doi.org/10.1007/s10470-014-0480-0
Keywords :jitter, low-power, PLL, DCO

Abstract :

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